FSD114: 61508-1 E/E/PE system safety requirements specification

Header

Title

FSD114: 61508-1 E/E/PE system safety requirements specification

Version

V16

Products

Safety Simplifier

Requirements

61508-2:7.2.3.1

Purpose

Specify safety requirements

Input

FSD010: Concept, overall scope definition, and market requirements, FSD011: Hazard and risk analysis

Output

FSD114: 61508-1 E/E/PE system safety requirements specification

Table of contents

Description

This document corresponds to phase 9 in Figure 2 - Overall safety lifecycle in IEC 61508-1.

Input to this document is the risk analysis FSD011: Hazard and risk analysis, as well as market requirements defined in FSD010: Concept, overall scope definition, and market requirements.

Motivations

Motivation: SSRS from safety requirements allocation MOTIVATION_114_001
status: PASS

Since the lifecycle phases before phase 9 are not performed (see Element safety function (MOTIVATION_002_001)) the inputs to phase 9 (this document) are the the risk analysis (FSD011: Hazard and risk analysis), and the market requirements (FSD010: Concept, overall scope definition, and market requirements).

Motivation: SSRS availability MOTIVATION_114_002
status: PASS

All developers have access to the documentation, including the system safety requirements specification. All developers also have direct communication with people involved with the documentation, management, and FSA.

Motivation: SSRS according to EN-61508-1 clause 7.10.2.4 MOTIVATION_114_005
status: PASS

The system safety requirements specification is written according to the requirements specified in 61508, and is written with the goal to be understandable for the people involved in the management, development, and FSA.

See test Phase 9 (TEST_107_001).

TEST: SSRS contains SIL and safety function requirements MOTIVATION_114_006

The system safety requirements specification contains the system safety function requirements for the Safety Simplifier and the requirements for system safety integrity. SIL requirements is specified in SIL3/CAT4/PLe (SREQ_01A). The safety function requirements are derived from inputs to this document (risk analysis and market requirements).

See Safety function requirements (MOTIVATION_114_003) and SIL requirements (MOTIVATION_114_004).

Motivation: Safety function requirements MOTIVATION_114_003
status: PASS

a) First see Element safety function (MOTIVATION_002_001). Static safe state (SREQ_05) specifies safe state (no continuous control). High demand/continous mode (SREQ_06A) specifies high demand/continuous mode.

b) Response time performance is specified in Max response time (SREQ_07), Response time (SREQ_08A), Link timeout (SREQ_08B), and Dangerous failure response ... (SREQ_09A).

c) The operator interfaces are specified in No external control (SREQ_02), Means of configuration (SREQ_10A).

d) See SIL3/CAT4/PLe (SREQ_01A).

e) Interfaces to other safety-related systems include only Simplifier Gateway, which is covered by the SimpleCAN protocol specification. PC software is used to configure units and systems. See Means of configuration (SREQ_10A).

f) N/A, EUC is not included in the scope.

g) See Modes of operation (SREQ_15A) and Configuration mode (SREQ_15B).

Motivation: SIL requirements MOTIVATION_114_004
status: PASS

a) As per market requirement, SIL3 and PLe/Category 4 is required, see SIL3/CAT4/PLe (SREQ_01A).

b) Continuous/high demand, according to 61508-1, table 3, which gives a target failure measure (probability of dangerous failure per hour) of ≥10-8 to ≤ 10-7. See High demand/continous mode (SREQ_06A) and High demand or continuous m... (SREQ_06B).

c) Specified in FSD202.

d) Proof testing activities are not used, instead automatic online diagnostic tests are implemented. See Startup/continous tests & d... (SREQ_16A).

e) See Environmental conditions (SREQ_17A), Storage temperature (SREQ_17B), Operating temperature (SREQ_17C), Environmental conditions (SREQ_17D), and ES1 according to IEC/EN 623... (SREQ_18C).

f) See CE/EMC (SREQ_19).

g) Hardware common cause failure analysis in FSD203: Estimation of hardware common cause failures.

Motivation: high demand/continuous mode MOTIVATION_114_007
status: PASS
Source: SREQ_06B

The Safety Simplifier is a control system intended for implementation of the logic part (subsystem) of one or several safety functions for machinery (i.e. high-/continuous mode of operation).

See also 6P04925 RISE hardware evalu... (CERT_0005).

SREQ summary

SREQ summary

ID

Title

Source

Status

Derived

SREQ_01A

SIL3/CAT4/PLe

MREQ_01

PASS

DREQ_CAT4_1; DREQ_103A; DREQ_REDUNDANCY_1; DREQ_EMC_1; DREQ_EMC_2; DREQ_107A; DREQ_113A; DREQ_17B; DREQ_17C

SREQ_01B

PLC

MREQ_02

PASS

DREQ_122A; DREQ_201A; DREQ_LOGIC_201A; DREQ_LOGIC_201B; DREQ_CAT4_1; DREQ_REDUNDANCY_1

SREQ_02

No external control

HAZARD_20

PASS

DREQ_15A

SREQ_03A

Internal failure monitoring

SREQ_N_01

PASS

DREQ_28B; DREQ_111A; DREQ_16C; DREQ_01F; DREQ_115A; DREQ_115B; DREQ_201A; DREQ_27B; DREQ_16B; DREQ_16A; DREQ_108A; DREQ_C2C_6

SREQ_03B

Internal failure safe state

SREQ_N_01

PASS

DREQ_3A

SREQ_04A

External failure safe state

SREQ_N_02

PASS

DREQ_4A

SREQ_04B

Design safe state

SREQ_N_02; SREQ_N_04

PASS

DREQ_4A

SREQ_05

Static safe state

SREQ_N_03

PASS

DREQ_SAFESTAE_1; DREQ_SAFESTAE_2

SREQ_06A

High demand/continous mode

MREQ_01

PASS

DREQ_NORMALMODE_1

SREQ_06B

High demand or continuous mode calculations

MREQ_01

PASS

MOTIVATION_114_007

SREQ_07

Max response time

SREQ_N_15A

PASS

SREQ_08A; SREQ_08B; SREQ_09A; SREQ_09B; SREQ_22

SREQ_07B

Response time in user manual

PASS

DREQ_7C

SREQ_08A

Response time

SREQ_07; SREQ_27

PASS

DREQ_27A; DREQ_27B

SREQ_08B

Link timeout

SREQ_07; SREQ_27

PASS

DREQ_RADIO_3A; DREQ_RADIO_3B; DREQ_123A

SREQ_09A

Dangerous failure response time

SREQ_07; SREQ_27

PASS

TEST_150_010; MOTIVATION_300_312

SREQ_09B

Dangerous failure response time network

SREQ_07; SREQ_27

PASS

DREQ_9A; TEST_150_021

SREQ_109A

Trained personnel

PASS

DREQ_MANUAL_23

SREQ_10A

Means of configuration

MREQ_03; SREQ_N_17

PASS

DREQ_10A; DREQ_10B

SREQ_10B

Configuration authorization

SREQ_N_17

PASS

DREQ_LOGIC_200E

SREQ_11

I/O ON/OFF states

MREQ_05

PASS

DREQ_11A; DREQ_126B

SREQ_110A

Safety manual

PASS

DREQ_MANUAL_23; MANUAL_REQS_FROM_STANDARD

SREQ_12

Potential free outputs

MREQ_04

PASS

DREQ_12A; DREQ_01E; DREQ_105A; DREQ_127A

SREQ_13A

Digital outputs

MREQ_05; SREQ_N_02

PASS

DREQ_01F; DREQ_104A; DREQ_115A; DREQ_115B; DREQ_115C; DREQ_115D; DREQ_115E; DREQ_115F; DREQ_126A; DREQ_13A; DREQ_15A

SREQ_13B

Digital inputs

MREQ_05; SREQ_N_02

PASS

DREQ_01C; DREQ_102A; DREQ_114A; DREQ_16C; DREQ_114B; DREQ_114C; DREQ_114D; DREQ_114E; DREQ_116B; DREQ_116C; DREQ_14A; DREQ_11A; DREQ_126B

SREQ_15A

Modes of operation

SREQ_N_03

PASS

DREQ_MODES_1; DREQ_NORMALMODE_1; DREQ_SAFESTAE_1; DREQ_SAFESTAE_2; DREQ_LOGIC_200A; DREQ_LOGIC_200B; DREQ_LOGIC_200C; DREQ_LOGIC_200D; DREQ_LOGIC_200G

SREQ_16A

Startup/continous tests & diagnostic

SREQ_N_01

PASS

DREQ_16B; DREQ_16A; DREQ_16C; DREQ_LOGIC_202B

SREQ_16B

Startup/continous tests & diagnostic

SREQ_N_19

PASS

DREQ_111A; DREQ_LOGIC_202B

SREQ_17A

Environmental conditions

MREQ_09; SREQ_N_18

PASS

DREQ_17C; DREQ_MANUAL_11

SREQ_17B

Storage temperature

MREQ_09; SREQ_N_18

PASS

DREQ_17C; DREQ_MANUAL_11

SREQ_17C

Operating temperature

MREQ_09; SREQ_N_18

PASS

DREQ_17C; DREQ_17D; DREQ_MANUAL_11

SREQ_17D

Environmental conditions

SREQ_N_18

PASS

DREQ_17B; DREQ_MANUAL_11

SREQ_18A

ES1 according to IEC/EN 62368-1

SREQ_N_18

PASS

CERT_0007

SREQ_18B

ES1 according to IEC/EN 62368-1

SREQ_N_18

PASS

DREQ_PSU_01; DREQ_24A; DREQ_24B; DREQ_24C; DREQ_24D; DREQ_101A; DREQ_111A; DREQ_124A

SREQ_18C

ES1 according to IEC/EN 62368-1

SREQ_N_18

PASS

DREQ_MANUAL_10

SREQ_19

CE/EMC

SREQ_N_18

PASS

DREQ_EMC_1; DREQ_EMC_2; DREQ_113A

SREQ_20

Radio source nodes

SREQ_N_16B

PASS

SWSREQ_034D; SWSREQ_037A; SWSREQ_037B

SREQ_21

Safe state during software upgrade

SREQ_N_03; SREQ_N_04

PASS

DREQ_LOGIC_200A; DREQ_LOGIC_200B

SREQ_22

Communication timeout

SREQ_N_06; SREQ_07; SREQ_27

PASS

DREQ_RADIO_3A; DREQ_RADIO_3B

SREQ_24

Power supply

SREQ_N_10; SREQ_N_19

PASS

DREQ_24A; DREQ_24B; DREQ_24C; DREQ_24D

SREQ_26A

Input filter

SREQ_N_14A; SREQ_N_14C

PASS

DREQ_14A

SREQ_26B

Input filter

SREQ_N_14A; SREQ_N_14C

PASS

DREQ_26A

SREQ_27

Timing accuracy

SREQ_N_15A

PASS

SREQ_08A; SREQ_08B; SREQ_09A; SREQ_09B; SREQ_22

SREQ_28A

Unique ID

SREQ_N_16A

PASS

DREQ_28A; DREQ_28B

SREQ_28B

Unique ID

SREQ_N_16A

PASS

DREQ_28C

SREQ_28C

Unique IDs

SREQ_N_16A

PASS

DREQ_28C

SREQ_29B

Networks

SREQ_N_16B

PASS

SWSREQ_034D

SREQ_30A

Non safety functions

HAZARD_21

PASS

DREQ_30A

SREQ_N_01

Dangerous internal hardware failures shall be detected

HAZARD_01

PASS

SREQ_03A; SREQ_03B; SREQ_16A

SREQ_N_02

External failures shall be detected and handled

HAZARD_02

PASS

SREQ_04A; SREQ_04B; SREQ_13A; SREQ_13B

SREQ_N_03

Safe state during configuration

HAZARD_03

PASS

SREQ_05; SREQ_15A; SREQ_15B; SREQ_21

SREQ_N_04

Safe state in other nodes during configuration

HAZARD_04

PASS

SREQ_04B; SREQ_21

SREQ_N_05

Safe state during fatal error

HAZARD_5

PASS

SREQ_15C

SREQ_N_06

Safe state in other nodes during fatal error

HAZARD_6

PASS

SREQ_22

SREQ_N_07A

Procedures for correctly configuring Safety Simplifier

HAZARD_7; HAZARD_08; HAZARD_11; HAZARD_12; HAZARD_13

PASS

DREQ_MANUAL_20; DREQ_MANUAL_21; DREQ_MANUAL_22; DREQ_LOGIC_210B; DREQ_LOGIC_210C

SREQ_N_07B

Configuration

HAZARD_7; HAZARD_08; HAZARD_11; HAZARD_12; HAZARD_13

PASS

DREQ_LOGIC_210D

SREQ_N_07C

Configuration

HAZARD_13

PASS

DREQ_LOGIC_202A; DREQ_LOGIC_202B

SREQ_N_07D

Configuration

HAZARD_11

PASS

DREQ_LOGIC_200E; DREQ_LOGIC_200H; DREQ_LOGIC_210A; DREQ_LOGIC_210B; DREQ_LOGIC_210C

SREQ_N_09A

Radio communication

HAZARD_09

PASS

DREQ_RADIO_1

SREQ_N_09B

CAN communication

MREQ_07; MREQ_08; HAZARD_09

PASS

DREQ_CAN_1; DREQ_CAN_2

SREQ_N_09C

General black channel interface

HAZARD_09

PASS

BLCH0002

SREQ_N_09D

CPU2CPU communication

HAZARD_09

PASS

DREQ_C2C_1; DREQ_C2C_2; DREQ_C2C_3; DREQ_C2C_4; DREQ_C2C_5; DREQ_C2C_6; DREQ_C2C_7; DREQ_C2C_8

SREQ_N_10

Power supply

HAZARD_10

PASS

SREQ_24

SREQ_N_14A

Fault handling

HAZARD_14

PASS

SREQ_26A; SREQ_26B; DREQ_LOGIC_200F

SREQ_N_14B

Fault handling

HAZARD_14

PASS

DREQ_DIAGNOSTIC_01

SREQ_N_14C

Fault handling

HAZARD_14

PASS

SREQ_26A; SREQ_26B

SREQ_N_15A

Time measurment accuracy

HAZARD_15

PASS

SREQ_07; SREQ_27

SREQ_N_15B

Time measurment faults

HAZARD_15

PASS

DREQ_27A; DREQ_27B; DREQ_108A; DREQ_108B

SREQ_N_16A

All units shall have a unique identifier

HAZARD_16

PASS

SREQ_28A; SREQ_28B; SREQ_28C

SREQ_N_16B

All nodes in a network shall be specified in the configuration

HAZARD_16

PASS

SREQ_20; SREQ_29B; SWSREQ_034D

SREQ_N_17

Unauthorized use

HAZARD_17

PASS

SREQ_10A; SREQ_10B

SREQ_N_18

Environmental conditions

HAZARD_18

PASS

SREQ_17A; SREQ_17B; SREQ_17C; SREQ_17D; SREQ_18A; SREQ_18B; SREQ_18C; SREQ_19

SREQ_N_19

Restart and reset

HAZARD_19

PASS

SREQ_16B; SREQ_24

Safety requirements

Requirement: Dangerous internal hardware failures shall be detected SREQ_N_01
status: PASS
tags: sreq
Source: HAZARD_01

All possible internal hardware failures that may lead to a loss of safety function shall be monitored, detected, and handled.

Requirement: External failures shall be detected and handled SREQ_N_02
status: PASS
tags: sreq

Dangerous external hardware failures shall be detected and handled.

Requirement: Safe state during configuration SREQ_N_03
status: PASS
tags: sreq

During configuration, all outputs shall be in a safe state.

Requirement: Safe state in other nodes during configuration SREQ_N_04
status: PASS
tags: sreq
Derived: SREQ_04B, SREQ_21
Source: HAZARD_04

During configuration of a unit, relevant outputs in other units shall be in a safe state.

Requirement: Safe state during fatal error SREQ_N_05
status: PASS
tags: sreq
Derived: SREQ_15C
Source: HAZARD_5

In case of a dangerous fault being detected, all outputs shall be in a safe state.

Requirement: Safe state in other nodes during fatal error SREQ_N_06
status: PASS
tags: sreq
Derived: SREQ_22
Source: HAZARD_6

In case of a fatal error in a unit, relevant outputs in other units shall be in a safe state.

Note

This is handled via radio timeout = resulting in all affected outputs going to OFF state, which is the design safe state as implemented by the user (see Design safe state (SREQ_04B)).

Requirement: Procedures for correctly configuring Safety Simplifier SREQ_N_07A

Procedures for correctly identifying units for configuring shall be provided to end users.

Requirement: Configuration SREQ_N_07B
status: PASS
tags: sreq

The success or failure of a configuration attempt shall be clear to the user.

Requirement: Configuration SREQ_N_07C
status: PASS
tags: sreq

Corrupted configurations shall be detected and handled.

Requirement: Configuration SREQ_N_07D

During configuration, the firmware and PC configuration software shall guarantee that the configuration is downloaded to the correct unit.

Requirement: Radio communication SREQ_N_09A
status: PASS
tags: sreq
Derived: DREQ_RADIO_1
Source: HAZARD_09

The radio communication interface shall fulfil the requirements for black channel communication as defined in IEC 61784-3.

Requirement: CAN communication SREQ_N_09B
status: PASS
tags: sreq

The CAN communication interface shall fulfil the requirements for black channel communication as defined in IEC 61784-3.

The safety CAN communication protocol shall be SimpleCAN (as specified in FSD350).

Requirement: General black channel interface SREQ_N_09C
status: PASS
tags: sreq
Derived: BLCH0002
Source: HAZARD_09

The general black channel interface shall fulfil the requirements for black channel communication as defined in IEC 61784-3.

Requirement: CPU2CPU communication SREQ_N_09D

The CPU2CPU communication shall fulfil the requirements for white channel communication as defined in IEC 61508 and IEC 61784-3.

Requirement: Power supply SREQ_N_10
status: PASS
tags: sreq
Derived: SREQ_24
Source: HAZARD_10

No voltage, low voltage, high voltage, and unstable voltage shall be detected and handled.

Requirement: Fault handling SREQ_N_14A
status: PASS
tags: sreq

Fault monitoring shall not lead to false positives, and normal operation shall be stable.

Requirement: Fault handling SREQ_N_14B
status: PASS
tags: sreq
Source: HAZARD_14

If a fault is detected, the cause and mitigation of that fault shall be clear to the user.

Requirement: Fault handling SREQ_N_14C
status: PASS
tags: sreq
Derived: SREQ_26A, SREQ_26B
Source: HAZARD_14

Common input signal errors (such as disturbances and noisy signals), up to reasonable specific limits (such as frequency, voltage, and duration), shall be handled.

Requirement: Time measurment accuracy SREQ_N_15A
status: PASS
tags: sreq
Derived: SREQ_07, SREQ_27
Source: HAZARD_15

All timing requirements shall be specified and met, within a reasonable specified margin.

Requirement: Time measurment faults SREQ_N_15B
status: PASS
tags: sreq

Hardware and software relating to time measurement shall be monitored for faults that can cause timing inaccuracies.

Requirement: All units shall have a unique identifier SREQ_N_16A
status: PASS
tags: sreq
Source: HAZARD_16

All units shall have a unique identifier, which cannot be changed.

Note

Unique in the context of Safety Simplifier, i.e., two Safety Simplifiers shall not have the same identifier.

Requirement: All nodes in a network shall be specified in the configuration SREQ_N_16B
status: PASS
tags: sreq

The configuration shall specify all nodes that are part of the network by their unique identifier.

Requirement: Unauthorized use SREQ_N_17
status: PASS
tags: sreq
Derived: SREQ_10A, SREQ_10B
Source: HAZARD_17

Unauthorized users shall not be able to reconfigure a unit.

Requirement: Environmental conditions SREQ_N_18
status: PASS
tags: sreq

The environmental conditions that the Safety Simplifier can be used in shall be specified.

Todo

Is the environmental conditions rather a market requirement?

Requirement: Restart and reset SREQ_N_19
status: PASS
tags: sreq
Derived: SREQ_16B, SREQ_24
Source: HAZARD_19

Restart and reset shall not result in a hazard or unsafe function.

Requirement: SIL3/CAT4/PLe SREQ_01A

The Safety Simplifier shall implement part (as logic subsystem) of one or several overall safety function(s) operating on an EUC within scope of the Machinery Directive 2006/42/EC and assigned/associated with a safety integrity requirement up to SIL 3 (IEC 61508) and/or PLe / CAT 4 (ISO 13849-1).

Requirement: PLC SREQ_01B

The element safety function of the Safety simplifier shall provide output signals in accordance to a user defined algorithm/configuration in combination with the signals on its inputs, up to SIL 3/PL e.

Requirement: No external control SREQ_02
status: PASS
tags: sreq
Derived: DREQ_15A
Source: HAZARD_20

There shall exist no external interface to directly control safety outputs.

Requirement: Internal failure monitoring SREQ_03A

All possible internal dangerous failures shall be monitored, detected, and handled.

Requirement: Internal failure safe state SREQ_03B
status: PASS
tags: sreq
Derived: DREQ_3A
Source: SREQ_N_01

If an internal dangerous failure is detected, the unit shall enter safe state, as defined in Static safe state (SREQ_05).

Requirement: External failure safe state SREQ_04A
status: PASS
tags: sreq
Derived: DREQ_4A
Source: SREQ_N_02

If an external dangerous failure is detected, all affected outputs in all affected units shall either go low (0V) or go into OFF-state depending on the detected failure.

Note

OFF-state is not the same as “turning off”. OFF-state for transistor outputs is a “design safe state” defined by the user.

Requirement: Design safe state SREQ_04B
status: PASS
tags: sreq
Derived: DREQ_4A

Design safe state shall be defined as either safe state or OFF-state. The system integrator defines the design safe state.

Requirement: Static safe state SREQ_05
status: PASS
tags: sreq

The Safety Simplifier shall achieve a safe state in a static manner by all outputs going low (0V), i.e. no continuous control is needed. This shall be defined as “Safe state”.

Requirement: High demand/continous mode SREQ_06A
status: PASS
tags: sreq
Source: MREQ_01

The element safety functions provided by the simplifier system shall operate in high demand or continuous mode.

Requirement: High demand or continuous mode calculations SREQ_06B
status: PASS
tags: sreq
Source: MREQ_01

High demand or continuous mode shall be used for calculation of PFHd MTTFd.

Requirement: Max response time SREQ_07
status: PASS
tags: sreq

The absolute maximum time delay (response time) \(T_{Rmax}\), shall not exceed

\(T_{Rmax} = T_R + T_{CL}\)

Response time \(T_R\) is defined in Response time (SREQ_08A).

Maximum configurable link timeout \(T_{CL}\) is defined in Link timeout (SREQ_08B).

Note

Response times defined here do not consider filtering and delays defined by the integrator.

Requirement: Response time in user manual SREQ_07B
status: PASS
tags: sreq
Derived: DREQ_7C

A method to calculate the overall response time shall be available to users.

Requirement: Response time SREQ_08A
status: PASS
tags: sreq
Derived: DREQ_27A, DREQ_27B
Source: SREQ_07, SREQ_27

For valid I/O signals, the response time from input to output shall not exceed:

\(T_R = T_I + T_L + T_O\)

where:

  • \(T_R\) is the total maximum reaction time from signal change on an input to reaction on outputs,

  • \(T_I\) is the maximum reaction time between a signal change on an input until the change is reflected in logic,

  • \(T_L\) is the maximum reaction time to process the change on the input (i.e. logic) until the control of affected outputs changes, not counting intentional delays and filters.

  • \(T_O\) is the maximum reaction time between a control signal to an output has changed until the physical output signal changes.

Note

Response times defined here do not consider filtering and delays defined by the integrator.

Todo

input/logic/output response time table.

Requirement: Link timeout SREQ_08B
status: PASS
tags: sreq

The communication link timeout \(T_{CL}\) shall be configurable in the range 2ms-60000ms.

Note

Normally, values outside the range ~10ms to ~2s are exceptional, but allowed by these safety requirements for special applications.

Requirement: Dangerous failure response time SREQ_09A
status: PASS
tags: sreq

The maximum delay between a dangerous failure occuring in a unit and safe state is reached in the unit shall be 500ms.

Requirement: Dangerous failure response time network SREQ_09B
status: PASS
tags: sreq
Source: SREQ_07, SREQ_27

The maximum delay between a dangerous failure occuring in a unit and until all affected outputs in the complete system have reached safe state or design safe state, shall be \(T_{Rmax} + 500\) ms. \(T_{Rmax}\) is defined in Max response time (SREQ_07).

Note

The complete system here refers to all nodes in a network that depend on inputs from the node that detected the failure.

Requirement: Means of configuration SREQ_10A
status: PASS
tags: sreq
Derived: DREQ_10A, DREQ_10B

There shall be no user interface to replace units. For commissioning and replacement (including repairs), all units shall be programmed by a PC or a memory card.

Requirement: Configuration authorization SREQ_10B
status: PASS
tags: sreq
Source: SREQ_N_17

All changes to configuration by PC shall be authorized by a password.

Requirement: I/O ON/OFF states SREQ_11
status: PASS
tags: sreq
Source: MREQ_05

All I/O shall have a defined ON-state and OFF-state.

Note

The ON and OFF states are defined by defining the signal types of all I/Os in ON and OFF state.

Requirement: Potential free outputs SREQ_12
status: PASS
tags: sreq

Safety Simplifier shall have optional potential free outputs.

Requirement: Digital outputs SREQ_13A

Safety Simplifier shall have optional static and coded transistor outputs.

Requirement: Digital inputs SREQ_13B

The Safety Simplifier shall have static, coded and analogue inputs.

Note

The analogue inputs can be used as digital inputs via a comparator.

Requirement: Modes of operation SREQ_15A

The following modes of operation shall be available:

Requirement: Configuration mode SREQ_15B
status: PASS
Source: SREQ_N_03

There shall exist a configuration mode which is the only mode where a new configuration is accepted. In configuration mode, the unit shall be in safe state as defined in Static safe state (SREQ_05).

Requirement: Fatal error mode SREQ_15C
status: PASS
Derived: TEST_150_010
Source: SREQ_N_05

There shall exist a fatal error mode where the unit shall be in safe state as defined in Static safe state (SREQ_05). If a fatal error is detected, the unit shall enter this mode. All parts of the system that are affected by the fatal error shall be switched off/unavailable.

Requirement: Startup/continous tests & diagnostic SREQ_16A
status: PASS
tags: sreq

Automatic diagnostic test shall be either start-up tests or continuous tests during operation.

Requirement: Startup/continous tests & diagnostic SREQ_16B
status: PASS
tags: sreq

A restart (such as power cycle or software reset) shall not result in an unsafe function.

Requirement: Environmental conditions SREQ_17A
status: PASS
tags: sreq

The environmental conditions that the device is considered to be exposed to during its lifecycle (except during testing) are temperature (operation and storage), humidity (operation and storage), and vibration (operation and storage).

Requirement: Storage temperature SREQ_17B
status: PASS
tags: sreq

The test requirement for storage temperature shall be -40°C to +70°C and storage humidity less than 95%.

Requirement: Operating temperature SREQ_17C
status: PASS
tags: sreq

For units in IP65 enclosure, the test requirement for operating temperature shall be -30°C to +60°C and operating humidity less than 95%.

Requirement: Environmental conditions SREQ_17D
status: PASS
tags: sreq
Source: SREQ_N_18

The test requirement for vibration shall be according to 3G 5-300Hz.

Requirement: ES1 according to IEC/EN 62368-1 SREQ_18A
status: PASS
tags: sreq
Derived: CERT_0007
Source: SREQ_N_18

Safety simplifier power supply shall fulfil requirements for ES1 according to IEC/EN 62368-1.

Requirement: ES1 according to IEC/EN 62368-1 SREQ_18B
status: PASS
tags: sreq

Safety simplifier power supply voltage shall be within minimum 7VDC up to maximum 33VDC.

Requirement: ES1 according to IEC/EN 62368-1 SREQ_18C
status: PASS
tags: sreq
Source: SREQ_N_18

For interfacing the Safety Simplifier to other devices, all voltages shall be below 50V.

Requirement: CE/EMC SREQ_19
status: PASS
tags: sreq

Safety Simplfier shall fulfil the requirements for CE.

Requirement: Radio source nodes SREQ_20
status: PASS
tags: sreq

A node shall only use safety data via radio or CAN from other nodes that are part of its network.

Requirement: Safe state during software upgrade SREQ_21
status: PASS
tags: sreq

A node shall not be part of any safety function during software upgrade (safe state).

Requirement: Communication timeout SREQ_22
status: PASS
tags: sreq

After link timeout (radio and CAN), a receiving node shall consider all safety signals from the timed out node as 0.

Note

Signals defined as non-safe may be used as the last valid value.

Requirement: Power supply SREQ_24
status: PASS
tags: sreq

Safety Simplifier shall handle the following power supply failures:

  1. Low voltage

  2. Removal of supply

  3. Unstable voltage

Requirement: Input filter SREQ_26A
status: PASS
tags: sreq
Derived: DREQ_14A

Input signal noise shall be handled.

Requirement: Input filter SREQ_26B
status: PASS
tags: sreq
Derived: DREQ_26A

Input signals shall have configurable filter.

Requirement: Timing accuracy SREQ_27
status: PASS
tags: sreq

All timing shall be performed with an accuracy better than 2ms + 0.1%.

Requirement: Unique ID SREQ_28A
status: PASS
tags: sreq
Derived: DREQ_28A, DREQ_28B
Source: SREQ_N_16A

Each Safety Simplifier shall have a unique ID.

Requirement: Unique ID SREQ_28B
status: PASS
tags: sreq
Derived: DREQ_28C
Source: SREQ_N_16A

Each memory card module shall have a unique ID.

Requirement: Unique IDs SREQ_28C
status: PASS
tags: sreq
Derived: DREQ_28C
Source: SREQ_N_16A

Memory cards and Safety Simplifier shall use the same ID series.

Requirement: Networks SREQ_29B
status: PASS
tags: sreq
Derived: SWSREQ_034D
Source: SREQ_N_16B

A node which transmits safety data shall seed the checksum with its own unique ID, or the ID of an installed memory card module.

Note

Using the ID of the memory card is to allow exchanging units by moving the memory card, without needing to reconfigure the whole network.

Requirement: Trained personnel SREQ_109A
status: PASS
tags: sreq

Only trained personnel following design procedure shall be allowed to configure a simplifier.

Requirement: Safety manual SREQ_110A
status: PASS
tags: sreq

The safety manual shall fulfill the requirements for safety manual in 61508.

Requirement: Non safety functions SREQ_30A
status: PASS
tags: sreq
Derived: DREQ_30A
Source: HAZARD_21

Non safety related functions in hardware and software shall not interfere with safety functions in an unsafe manner.

Note

Non safety related functions are functions such as diagnostics, configuration, monitoring, and debugging.

Revision History

Date

By

Version

Description

2017-02-23

Mats Linger

V1

Initial version

2017-03-02

Mats Linger

V2

Added Req11

2017-06-30

Mats Linger

V8

Correction of text, no change in requirements.

2017-07-07

Mats Linger

V9

SREQ 28 and SREQ 29

2017-08-18

Mats Linger

V10

SREQ 10 changed.

2017-09-10

Mats Linger

V11

SREQ 8 changed

2017-10-09

Mats Linger

V12

SREQ 7 & 8 changed

2018-04-12

Mats Linger

V13

Figure redrawn, no changes

2018-04-16

Mats Linger

V14

SREQ 4 change to affected unit.

2018-05-02

Mats Linger

V15

Modified SREQ8

2023-08-15

William Forsdal

V16

Changes:

  • Rewrite to reStructuredText and restructure for new FSA documentation structure.

  • Redefine response times.

  • Split some requirements into into subrequirements.

  • General clarifications without modifications.

2024-11-15

William Forsdal

V17

Changes:

  • Added description section

  • Moved sreq summary to top

  • Split SREQ_03 into two requirements and generalized.

  • Update SREQ_06 to ‘shall’

  • Clarified SREQ_15 to specify each mode of operation,

  • Clarified requirements in general.

  • Added SREQ_30 SimpleCAN requirement.

  • Moved SREQ_01 and SREQ_02 to market requirements.

2024-12-02

William Forsdal

V18

Changes:

  • Added motivations for requirements in 61508-1.

2025-01-14

William Forsdal

V18

Changes:

  • Renamed SREQ_10 to SREQ_10A, and added SREQ_10B.

  • Renamed SREQ_16 to SREQ_16B, and add SREQ_16B (was DREQ_111.1 before).

  • Split SREQ_09 into two requirements and clarified.